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Diagram of the driver used in the video 'Spatial Energy Coherence #9.75'
In the preceding diagram the strange driver coil
shown supplying the AV Plug is
composed of a solid copper outer shell around a coreless Litz wire antenna coil
(as shown through out these pages). The following images will better explain this
new coil and what it looks like.
The following image shows one of the coils in a working circuit.
The following images show a side and end view of the coil construction.
Diagram of the driver used in the video 'Spatial Energy Coherence #9 & 9.5'
The Primary coil and the Load coil are the standard
ferrite antenna coils used in
most of the circuits shown in this research.
The current Stiffler Driver able to produce significant excess
Heat in a 1K ohm carbon resistor.
Heat gains in excess 500% while the driver transistor runs cool.
Do calculations match/show the gain?
Stiffler Driver 12-25-2007
Energy from the capacitor during the Sidac switch (On) period
Jc = ( C * ( Vmax^2 - Vmin^2 )) / 2
where; Vmax = the
max. voltage on C before sidac turns On
Because the output is pulsed, find the rms power value
Wrms = Jc * sqrt( Ton / ( Ton+Toff ))
where; Ton = time
sidac is On (sec.) discharging C
The power gain or loss
P% = ( Wrms / ( Vs * Is )) * 100
where; Vs = power supply
1ea. Sidac 120V, LittleFuse #K1300E70
One of the first circuits showing Energy Coherence
A standard Colpitts Oscillator design followed by a
matching driver to the AV Plug and load. The circuit is high in parts count
but offers a good amount of stability. Some frequency adjustment is possible
by using a variable inductor for L1.
Spatial Energy Coupling between Active and Passive energy coils
Stiffler Driver / Amplifier
In the Stiffler Driver / Amplifier a variable
inductor is included in the base circuit to ground. This inductor is not
to the Collector or Output coils, it is rather free standing and isolated from mutual coupling. The output circuit is a standard
SEC design where one end of the Primary is open and both ends of the Secondary are driving loads, but floating above the
driving circuit. The illustrated design was tested with an input of 12 volts at 20mA for a power in of 240mW. Each side of the
Secondary was loaded with 17 White LEDs for a total of 34. The current in the load legs was 5mA with an average drop
across the LEDs of 3 volts. Therefore the load was 34 x 3 x 0.005 = 510mW. The base operating frequency was 9.87MHz.
A SEC Driver Submitted by Mark McKay, PE
Named in the honor of Bedini
The Bedini Driver for SEC Research
The following image is of the circuit design and
test configuration used by Mark McKay, PE for testing and exploring
the validity of Spatial Energy Coherence. Mr. McKay is an active researcher exploring the SEC Hypothesis and is attempting
to not only replicate but explain in conventional Electrical Engineering what the SEC phenomenon is about.
The 'Callanan Driver' Circuit
by: Permission of the Inventor
This oscillator design is unique and is able to
provide a large dive to the loads
although I have not seen this driver exhibit the ability to Cohere Excess Energy.
It appears that the closed design, except for the AV Plug does not provide the
proper interface to the Spatial Lattice. This circuit should not be ignored and
should be looked at in during continued experimentation.
One of the more advanced associate researchers using the
his own design, simple and vastly robust circuit driver.
The 'Thomas' Oscillator
by: Permission of the inventor
A very good oscillator that is simple and highly effective.
Certain small modifications have been made from the original
with permission of the Inventor.
This oscillator contains the lowest parts count of
all circuits explored thus far. In fact in
many cases the capacitor from the base to ground was not required. This circuit as with the
Thomas Oscillator is able to provide a considerable amount of energy to the load, although
as with the Thomas circuit I have not observed the circuit's ability to interface with the
Spatial Lattice and Cohere additional energy. I believe this is again the result of the closed
design of the circuit.
Q1 should have an hfe >= 195
Bandwidth of 200-300mHZ
The 330k only helps start the oscollator and draws at max. 34uA
do not increase the value as low hfe transistors may not start.
The 68pf and 190pf capacitors form a voltage divider to limit the
drive to the Base.